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Microchip Technology /ATSAML11E15A /OSCCTRL /DFLLULPSYNCBUSY

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Interpret as DFLLULPSYNCBUSY

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (TUNE)TUNE 0 (DELAY)DELAY

Description

DFLLULP Synchronization Busy

Fields

ENABLE

Enable Bit Synchronization Busy
TUNE

Tune Bit Synchronization Busy
DELAY

Delay Register Synchronization Busy

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data